Method for low power boot for microcontroller
/A microcontroller includes a clock generator having an internal reference clock, a system mode controller establishing an operating mode, a flash memory having an internal clock and a non-volatile option register, and a boot mode selection logic circuit coupled to the system mode controller and the flash memory. The logic circuit outputs a boot mode selection signal instructing the microcontroller to boot in a very low power run (VLPR) mode or a RUN mode. The system mode controller enters the VLPR or RUN mode in response. The flash memory bypasses and disables its internal clock prior to calibration of the flash memory in the VLPR mode and prior to initialization of the flash memory in the RUN mode. The flash memory subsequently uses an external clock signal based on the output of the internal reference clock.